MX25L1005MC-12G CMOS 1,048,576 Bit Serial Flash Memory
Description:
MX25L1005 is a CMOS 1,048,576 bit serial Flash memory, which is configured as 131,072 x 8 internally.The MX25L1005 feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS# input.
The MX25L1005 provide sequential read operation on whole chip.
After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on page (256 bytes) basis, and erase command is executes on chip or sector(4K-bytes) or block(64K-bytes).
To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit.
When the device is not in operation and CS# is high, it is put in standby mode and draws less than 10uA DC current.
The MX25L1005 utilize MXIC's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.
Features:
- Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3
- 1,048,576 x 1 bit structure
- 32 Equal Sectors with 4K byte each - Any Sector can be erased individually
- 2 Equal Blocks with 64K byte each - Any Block can be erased individually
- Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program operations
- Latch-up protected to 100mA from -1V to Vcc +1V
- Low Vcc write inhibit is from 1.5V to 2.5V
Package included:
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